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» The High Level Architecture for Simulations
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IPPS
2010
IEEE
15 years 3 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
DFT
2008
IEEE
89views VLSI» more  DFT 2008»
16 years 1 months ago
Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA
Tolerating defects and fabrication variations will be critical in any system made with devices that have nanometer feature sizes. This paper considers how fabrication variations a...
Michael T. Niemier, Michael Crocker, Xiaobo Sharon...
ASPLOS
2006
ACM
16 years 16 days ago
Tartan: evaluating spatial computation for whole program execution
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...
Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea...
JVA
2006
IEEE
16 years 18 days ago
Programming Models for Grid Applications and Systems: Requirements and Approaches
History repeats itself. Since the invention of the programmable computer, numerous computer scientists keep dedicating their professional lives to the design of “the single, bes...
Thilo Kielmann
ASPLOS
2006
ACM
16 years 16 days ago
Dependable != unaffordable
This paper presents a software architecture for hardware fault tolerance based on loosely-synchronized, redundant virtual machines (LSRVM). LSRVM will provide high levels of relia...
Alan L. Cox, Kartik Mohanram, Scott Rixner