Sciweavers

5247 search results - page 930 / 1050
» The Generalized A* Architecture
Sort
View
LCTRTS
2009
Springer
16 years 1 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
LCTRTS
2009
Springer
16 years 1 months ago
Synergistic execution of stream programs on multicores with accelerators
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
CODES
2009
IEEE
16 years 1 months ago
An on-chip interconnect and protocol stack for multiple communication paradigms and programming models
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
Andreas Hansson, Kees Goossens
CODES
2009
IEEE
16 years 1 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
COMPSAC
2009
IEEE
16 years 1 months ago
Towards Validating Security Protocol Deployment in the Wild
As computing technology becomes increasingly pervasive and interconnected, mobility leads to shorter-lasting relationships between end-points with many different security requirem...
Luca Compagna, Ulrich Flegel, Volkmar Lotz