Sciweavers

5247 search results - page 890 / 1050
» The Generalized A* Architecture
Sort
View
DAC
2007
ACM
16 years 7 months ago
MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Fwu...
DAC
2007
ACM
16 years 7 months ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu
DAC
2000
ACM
16 years 7 months ago
Fingerprinting intellectual property using constraint-addition
Recently, intellectual property protection (IPP) techniques attracted a great deal of attention from semiconductor, system integration and software companies. A number of watermar...
Gang Qu, Miodrag Potkonjak
DAC
2001
ACM
16 years 7 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
DAC
2001
ACM
16 years 7 months ago
Chaff: Engineering an Efficient SAT Solver
Boolean Satisfiability is probably the most studied of combinatorial optimization/search problems. Significant effort has been devoted to trying to provide practical solutions to ...
Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao,...