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IPPS
2005
IEEE
16 years 4 days ago
Effective Instruction Prefetching via Fetch Prestaging
As technological process shrinks and clock rate increases, instruction caches can no longer be accessed in one cycle. Alternatives are implementing smaller caches (with higher mis...
Ayose Falcón, Alex Ramírez, Mateo Va...
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
16 years 4 days ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
ISPASS
2005
IEEE
16 years 4 days ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...
IMC
2005
ACM
16 years 3 days ago
Should Internet Service Providers Fear Peer-Assisted Content Distribution?
Recently, peer-to-peer (P2P) networks have emerged as an attractive solution to enable large-scale content distribution without requiring major infrastructure investments. While s...
Thomas Karagiannis, Pablo Rodriguez, Konstantina P...
SPAA
2005
ACM
16 years 3 days ago
Dynamic page migration with stochastic requests
The page migration problem is one of subproblems of data management in networks. It occurs in a distributed network of processors sharing one indivisible memory page of size D. Du...
Marcin Bienkowski