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ISCAS
2002
IEEE
95views Hardware» more  ISCAS 2002»
15 years 11 months ago
A differential DAC architecture with variable common-mode level
A differential current-steering digital-to-analog converter (DAC) architecture allowing the common-mode level of the input signal to be varied is presented. Simulation results wit...
K. Ola Andersson, N. U. Andersson, Mark Vesterback...
DAC
2002
ACM
16 years 7 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
ICC
2007
IEEE
143views Communications» more  ICC 2007»
16 years 1 months ago
Impact of Sampling Jitter on Mostly-Digital Architectures for UWB Bio-Medical Applications
Abstract— Ultra-wideband (UWB) impulse radio is a promising technique for low-power bio-medical communication systems. While a range of analog and digital UWB architectures exist...
Andrew Fort, Mike Chen, Robert W. Brodersen, Claud...
ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
16 years 1 months ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
169
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ICNC
2005
Springer
16 years 11 days ago
Double Robustness Analysis for Determining Optimal Feedforward Neural Network Architecture
This paper incorporates robustness into neural network modeling and proposes a novel two-phase robustness analysis approach for determining the optimal feedforward neural network (...
Lean Yu, Kin Keung Lai, Shouyang Wang