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ISCA
1996
IEEE
102views Hardware» more  ISCA 1996»
15 years 11 months ago
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, He...
ASPLOS
1994
ACM
15 years 10 months ago
Reducing Branch Costs via Branch Alignment
Several researchers have proposed algorithms for basic block reordering. We call these branch alignment algorithms. The primary emphasis of these algorithms has been on improving ...
Brad Calder, Dirk Grunwald
CF
2007
ACM
15 years 10 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
GECCO
2006
Springer
253views Optimization» more  GECCO 2006»
15 years 10 months ago
A novel approach to optimize clone refactoring activity
Achieving a high quality and cost-effective tests is a major concern for software buyers and sellers. Using tools and integrating techniques to carry out low cost testing are chal...
Salah Bouktif, Giuliano Antoniol, Ettore Merlo, Ma...
SAMOS
2004
Springer
16 years 1 days ago
Synchronous Transfer Architecture (STA)
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and ...
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil...