Sciweavers

6834 search results - page 1206 / 1367
» The Fail-Heterogeneous Architectural Model
Sort
View
PADS
2006
ACM
16 years 13 days ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto
SI3D
2006
ACM
16 years 12 days ago
Hardware accelerated multi-resolution geometry synthesis
In this paper, we propose a new technique for hardware accelerated multi-resolution geometry synthesis. The level of detail for a given viewpoint is created on-the-fly, allowing f...
Martin Bokeloh, Michael Wand
SIGMETRICS
2006
ACM
156views Hardware» more  SIGMETRICS 2006»
16 years 12 days ago
Maximizing throughput in wireless networks via gossiping
A major challenge in the design of wireless networks is the need for distributed scheduling algorithms that will efficiently share the common spectrum. Recently, a few distributed...
Eytan Modiano, Devavrat Shah, Gil Zussman
ANSS
2005
IEEE
16 years 3 days ago
An Extensible Platform for Evaluating Security Protocols
We present a discrete-event network simulator, called Simnet, designed specifically for analyzing networksecurity protocols. The design and implementation is focused on simplicit...
Seny Kamara, Darren Davis, Lucas Ballard, Ryan Cau...
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
16 years 2 days ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
« Prev « First page 1206 / 1367 Last » Next »