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DAC
2002
ACM
16 years 7 months ago
A comparison of three verification techniques: directed testing, pseudo-random testing and property checking
This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bris...
Mike Bartley, Darren Galpin, Tim Blackmore
DAC
2003
ACM
16 years 7 months ago
Death, taxes and failing chips
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
Chandu Visweswariah
DAC
2004
ACM
16 years 7 months ago
Toward a systematic-variation aware timing methodology
Variability of circuit performance is becoming a very important issue for ultra-deep sub-micron technology. Gate length variation has the most direct impact on circuit performance...
Puneet Gupta, Fook-Luen Heng
DAC
2004
ACM
16 years 7 months ago
Automated design of operational transconductance amplifiers using reversed geometric programming
We present a method for designing operational amplifiers using reversed geometric programming, which is an extension of geometric programming that allows both convex and non-conve...
Johan P. Vanderhaegen, Robert W. Brodersen
DAC
2004
ACM
16 years 7 months ago
Accurate pre-layout estimation of standard cell characteristics
With the advent of deep-submicron technologies, it has become essential to model the impact of physical/layout effects up front in all design flows [1]. The effect of layout paras...
Hiroaki Yoshida, Kaushik De, Vamsi Boppana
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