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ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
16 years 22 days ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
CODES
2006
IEEE
16 years 22 days ago
Resource virtualization in real-time CORBA middleware
Middleware for parallel and distributed systems is designed to virtualize computation and communication resources so that a more and consistent view of those resources is presente...
Christopher D. Gill
ICRA
2006
IEEE
149views Robotics» more  ICRA 2006»
16 years 21 days ago
On Learning the Statistical Representation of a Task and Generalizing it to Various Contexts
— This paper presents an architecture for solving generically the problem of extracting the constraints of a given task in a programming by demonstration framework and the problem...
Sylvain Calinon, Florent Guenter, Aude Billard
MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
16 years 20 days ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee
ACNS
2006
Springer
78views Cryptology» more  ACNS 2006»
16 years 20 days ago
DSO: Dependable Signing Overlay
Dependable digital signing service requires both high fault-tolerance and high intrusion-tolerance. While providing high fault-tolerance, existing approaches do not satisfy the hig...
Guofei Gu, Prahlad Fogla, Wenke Lee, Douglas M. Bl...
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