Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Given a regular collection of Mazurkiewicz traces, which can be seen as the behaviours of a finite-state concurrent system, one can associate with it a canonical regular event st...
Abstract. In general, disjunction is considered to add expressive power to propositional logic programs under stable model semantics, and to enlarge the range of problems which can...
Thomas Eiter, Michael Fink, Hans Tompits, Stefan W...
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
We consider the problem of bounded model checking of systems expressed in a decidable fragment of first-order logic. While model checking is not guaranteed to terminate for an ar...
Randal E. Bryant, Shuvendu K. Lahiri, Sanjit A. Se...