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IESS
2007
Springer
92views Hardware» more  IESS 2007»
16 years 1 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
RTSS
2007
IEEE
16 years 1 months ago
A UML-Based Design Framework for Time-Triggered Applications
Time-triggered architectures (TTAs) are strong candidate platforms for safety-critical real-time applications. A typical time-triggered architecture is constituted by one or more ...
Kathy Dang Nguyen, P. S. Thiagarajan, Weng-Fai Won...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
16 years 25 days ago
An automated design flow for 3D microarchitecture evaluation
- Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact...
Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Re...
MICRO
2000
IEEE
68views Hardware» more  MICRO 2000»
15 years 11 months ago
Efficient checker processor design
The design and implementation of a modern microprocessor creates many reliability challenges. Designers must verify the correctness of large complex systems and construct implemen...
Saugata Chatterjee, Christopher T. Weaver, Todd M....
IPPS
2003
IEEE
16 years 4 days ago
Integration of a CAN-Based Connection-Oriented Communication Model into Real-Time CORBA
The Real-Time CORBA and minimumCORBA specifications are important steps towards defining standard-based middleware which can satisfy real-time requirements in an embedded system...
Stefan Lankes, Andreas Jabs, Thomas Bemmerl