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ASYNC
2005
IEEE
132views Hardware» more  ASYNC 2005»
16 years 11 days ago
High Level Synthesis of Timed Asynchronous Circuits
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, C...
CEC
2005
IEEE
16 years 11 days ago
Dynamic power minimization during combinational circuit testing as a traveling salesman problem
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley,...
DEXAW
2005
IEEE
155views Database» more  DEXAW 2005»
16 years 11 days ago
MediaPeer: A Safe, Scalable P2P Architecture for XML Query Processing
Increasing popularity of XML and P2P networks has generated much interest in distributed processing of XML data. We propose a novel solution organized around a mediator capable of...
Florin Dragan, Georges Gardarin, Laurent Yeh
ICDM
2005
IEEE
133views Data Mining» more  ICDM 2005»
16 years 11 days ago
Summarization - Compressing Data into an Informative Representation
In this paper, we formulate the problem of summarization of a dataset of transactions with categorical attributes as an optimization problem involving two objective functions - co...
Varun Chandola, Vipin Kumar
ISCAS
2005
IEEE
147views Hardware» more  ISCAS 2005»
16 years 10 days ago
A two-chip, 4-MHz, microelectromechanical reference oscillator
— The paper describes a 4-MHz temperature compensated reference oscillator based on a capacitive silicon micro-mechanical resonator. The design of the resonator has been optimize...
Krishnakumar Sundaresan, Paul S. Ho, Siavash Pourk...