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HPCA
2009
IEEE
16 years 7 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
HPCA
2009
IEEE
16 years 7 months ago
Architectural Contesting
Previous studies have proposed techniques to dynamically change the architecture of a processor to better suit the characteristics of the workload at hand. However, all such appro...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
HPDC
2010
IEEE
15 years 7 months ago
Twister: a runtime for iterative MapReduce
MapReduce programming model has simplified the implementation of many data parallel applications. The simplicity of the programming model and the quality of services provided by m...
Jaliya Ekanayake, Hui Li, Bingjing Zhang, Thilina ...
COMPSAC
1997
IEEE
15 years 10 months ago
Classifying Architectural Elements as a Foundation for Mechanism Matching
Building a system at the architectural level can be thought of as decomposition into components followed by a series of exercises in matching. Components must be composed with eac...
Rick Kazman, Paul C. Clements, Leonard J. Bass, Gr...
ICDCS
2010
IEEE
15 years 10 months ago
How Wireless Power Charging Technology Affects Sensor Network Deployment and Routing
—As wireless power charging technology emerges, some basic principles in sensor network design are changed accordingly. Existing sensor node deployment and data routing strategie...
Bin Tong, Zi Li, Guiling Wang, Wensheng Zhang