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SBACPAD
2005
IEEE
110views Hardware» more  SBACPAD 2005»
16 years 3 days ago
Portable checkpointing and communication for BSP applications on dynamic heterogeneous Grid environments
Executing long-running parallel applications in Opportunistic Grid environments composed of heterogeneous, shared user workstations, is a daunting task. Machines may fail, become ...
Raphael Y. de Camargo, Fabio Kon, Alfredo Goldman
IPPS
1999
IEEE
15 years 10 months ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini
DAC
2007
ACM
16 years 7 months ago
Implicitly Parallel Programming Models for Thousand-Core Microprocessors
This paper argues for an implicitly parallel programming model for many-core microprocessors, and provides initial technical approaches towards this goal. In an implicitly paralle...
Wen-mei W. Hwu, Shane Ryoo, Sain-Zee Ueng, John H....
IPPS
2007
IEEE
16 years 25 days ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
EUROPAR
2004
Springer
15 years 12 months ago
Architecture-Independent Meta-optimization by Aggressive Tail Splitting
Several optimization techniques are hindered by uncertainties about the control flow in a program, which can generally not be determined by static methods at compile time. We pres...
Michael Rock, Andreas Koch