2155 search results - page 186 / 431 » The EM-X Parallel Computer: Architecture and Basic Performan... |
256
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HPDC
2008
IEEE
16 years 1 months ago
2008
IEEE
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...
195
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IWCC
1999
IEEE
15 years 11 months ago
1999
IEEE
In this paper, we propose a novel Single I/O Space architecture for achieving a Single System Image (SSI) at the I/O subsystem level. This is very much desired in a scalable clust...
167
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HPDC
1999
IEEE
15 years 11 months ago
1999
IEEE
Applications designed to execute on "computational grids" frequently require the simultaneous co-allocation of multiple resources in order to meet performance requiremen...
166
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PPAM
2005
Springer
16 years 1 days ago
2005
Springer
Abstract. A large number of MPI implementations are currently available, each of which emphasize diļ¬erent aspects of high-performance computing or are intended to solve a speciļ¬...
161
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ICPP
2008
IEEE
16 years 1 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...