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IMSCCS
2006
IEEE
16 years 5 days ago
Verification Environment for a SCMP Architecture
The computer architecture of Single-chip multiprocessor (SCMP) is one of important research topics in developing the next-generation of computer hardware. A verification environme...
Wenbin Yao, Nianmin Yao, Shaobin Cai, Jun Ni
VTS
1998
IEEE
87views Hardware» more  VTS 1998»
15 years 10 months ago
Fast Self-Recovering Controllers
A fast fault-tolerant controller structure is presented, which is capable of recovering from transient faults by performing a rollback operation in hardware. The proposed fault-to...
Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wu...
ICCAD
1994
IEEE
139views Hardware» more  ICCAD 1994»
15 years 10 months ago
Switching activity analysis considering spatiotemporal correlations
This work presents techniques for computing the switching activities of all circuit nodes under pseudorandom or biased input sequences and assuming a zero delay mode of operation....
Radu Marculescu, Diana Marculescu, Massoud Pedram
MASCOTS
2010
15 years 7 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...
HIS
2004
15 years 7 months ago
Q'tron Neural Networks for Constraint Satisfaction
This paper proposes the methods to solve the constraint satisfaction problems (CSPs) using Q'tron neural networks (NNs). A Q'tron NN is local-minima free if it is built ...
Tai-Wen Yue, Mei-Ching Chen