An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...
Abstract. We present algorithms for maintaining shortest path information in dynamic outerplanar digraphs with sublogarithmic query time. By choosing appropriate parameters we achi...
Hristo Djidjev, Grammati E. Pantziou, Christos D. ...
This paper presents pTask-- a system that allows users to automatically exploit dynamic task-level parallelism in sequential array-based C programs. The system employs compiler an...
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
We propose a model for the World Wide Web graph that couples the topological growth with the traffic's dynamical evolution. The model is based on a simple traffic-driven dynam...
Alain Barrat, Marc Barthelemy, Alessandro Vespigna...