9604 search results - page 272 / 1921 » The Duality of TIme and Information |
162
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ATS
2000
IEEE
15 years 11 months ago
2000
IEEE
We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
164
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HPCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Memorylatency isbecominganincreasingly importantperformance bottleneck, especially in multiprocessors. One technique for tolerating memory latency is multithreading, whereby we sw...
176
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MICRO
1997
IEEE
15 years 11 months ago
1997
IEEE
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI provides assertions that certain register values are dead, meaning they will n...
151
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HT
1997
ACM
15 years 11 months ago
1997
ACM
Traditionally hypertexts have been limited in size by the manual effort required to create hypertext links. In addition, large hyper–linked collections may overwhelm users with ...
194
Voted
ACCV
2009
Springer
15 years 10 months ago
2009
Springer
Abstract. In this paper we present an efficient technique to obtain accurate semantic classification on the pixel level capable of integrating various modalities, such as color, ed...