Abstract. This paper introduces a set of design principles that aim to make processor architectures amenable to static timing analysis. Based on these principles, we give a design ...
Time encoding is a real-time asynchronus mechanism of mapping analog amplitude information into multidimensional time sequences. We investigate the exact representation of analog ...
—This paper introduces a novel deployment time optimization technology for Internet services. Using the configuration information collected from the operation environment, the pr...
Sang Jeong Lee, Kang-Won Lee, Kyung Dong Ryu, Jong...
Practical reasoners are resource-bounded—in particular they require time to derive consequences of their knowledge. Building on the Timed Reasoning Logics (TRL) framework introdu...
We consider the problem of synthesizing controllers for timed systems modeled using timed automata. The point of departure from earlier work is that we consider controllers that ha...
Patricia Bouyer, Deepak D'Souza, P. Madhusudan, An...