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SASO
2009
IEEE
16 years 1 months ago
Generic Self-Adaptation to Reduce Design Effort for System-on-Chip
We investigate a generic self-adaptation method to reduce the design effort for System-on-Chip (SoC). Previous self-adaptation solutions at chip-level use circuitries which have b...
Andreas Bernauer, Oliver Bringmann, Wolfgang Rosen...
DATE
2005
IEEE
99views Hardware» more  DATE 2005»
16 years 5 days ago
A New System Design Methodology for Wire Pipelined SoC
Wire Pipelining (WP) has been proposed in order to limit the impact of increasing wire delays. In general, the added pipeline elements alters the system such that architectural ch...
Mario R. Casu, Luca Macchiarulo
MSWIM
2005
ACM
16 years 4 days ago
Using statistical design of experiments for analyzing mobile ad hoc networks
The performance of mobile ad hoc networks can be influenced by numerous factors, including protocol design at every layer; parameter settings such as retransmission limits and ti...
Michael W. Totaro, Dmitri D. Perkins
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
16 years 29 days ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...
ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
15 years 11 months ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...