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ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
15 years 11 months ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
FPL
2009
Springer
156views Hardware» more  FPL 2009»
15 years 11 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
WWW
2005
ACM
16 years 7 months ago
AwareDAV: a generic WebDAV notification framework and implementation
WebDAV needs awareness support in order to be a full-fledged collaboration system, This paper introduces AwareDAV, a new WebDAV extension framework enabling shared awareness throu...
Henning Qin Jehøj, Kaj Grønbæk...
SOUPS
2009
ACM
16 years 1 months ago
Graphical passwords as browser extension: implementation and usability study
Abstract: Today, most Internet applications still establish user authentication with traditional text based passwords. Designing a secure as well as a user-friendly password-based ...
Kemal Bicakci, Mustafa Yuceel, Burak Erdeniz, Haka...
GLOBECOM
2006
IEEE
16 years 20 days ago
Implementation of a Coded Modulation for Deep Space Optical Communications
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
Michael K. Cheng, Bruce E. Moision, Jon Hamkins, M...