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» The Design and Analysis of Parallel Algorithms
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TVCG
2012
183views Hardware» more  TVCG 2012»
13 years 9 months ago
Empirical Studies in Information Visualization: Seven Scenarios
—We take a new, scenario-based look at evaluation in information visualization. Our seven scenarios, evaluating visual data analysis and reasoning, evaluating user performance, e...
Heidi Lam, Enrico Bertini, Petra Isenberg, Catheri...
SIGECOM
2005
ACM
105views ECommerce» more  SIGECOM 2005»
16 years 6 days ago
Towards truthful mechanisms for binary demand games: a general framework
The family of Vickrey-Clarke-Groves (VCG) mechanisms is arguably the most celebrated achievement in truthful mechanism design. However, VCG mechanisms have their limitations. They...
Ming-Yang Kao, Xiang-Yang Li, Weizhao Wang
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 12 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
BMCBI
2007
171views more  BMCBI 2007»
15 years 6 months ago
Classification of microarray data using gene networks
Background: Microarrays have become extremely useful for analysing genetic phenomena, but establishing a relation between microarray analysis results (typically a list of genes) a...
Franck Rapaport, Andrei Zinovyev, Marie Dutreix, E...
DAC
2011
ACM
14 years 6 months ago
Thermal-aware cell and through-silicon-via co-placement for 3D ICs
Existing thermal-aware 3D placement methods assume that the temperature of 3D ICs can be optimized by properly distributing the power dissipations, and ignoring the heat conductiv...
Jason Cong, Guojie Luo, Yiyu Shi