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» The Design and Analysis of Parallel Algorithms
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GLVLSI
2005
IEEE
120views VLSI» more  GLVLSI 2005»
16 years 9 days ago
3D module placement for congestion and power noise reduction
3D packaging via System-On-Package (SOP) is a viable alternative to System-On-Chip (SOC) to meet the rigorous requirements of today’s mixed signal system integration. In this wo...
Jacob R. Minz, Sung Kyu Lim, Cheng-Kok Koh
MMSEC
2005
ACM
132views Multimedia» more  MMSEC 2005»
16 years 7 days ago
Resolution and quality scalable spread spectrum image watermarking
If digital watermarking is to adequately protect content in systems which provide both resolution and quality scalability, then the watermarking algorithms used must provide both ...
Angela Piper, Reihaneh Safavi-Naini, Alfred Mertin...
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 11 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
ATAL
2010
Springer
15 years 7 months ago
Parameterizing the winner determination problem for combinatorial auctions
Combinatorial auctions have been studied by the multiagent systems community for some time, since these auctions are an effective mechanism for resource allocation when agents are...
David Loker, Kate Larson
CAD
2008
Springer
15 years 6 months ago
Detecting approximate symmetries of discrete point subsets
Detecting approximate symmetries of parts of a model is important when attempting to determine the geometric design intent of approximate boundary-representation (B-rep) solid mod...
Ming Li, Frank C. Langbein, Ralph R. Martin