Sciweavers

5005 search results - page 683 / 1001
» The Design and Analysis of Parallel Algorithms
Sort
View
FPGA
2009
ACM
273views FPGA» more  FPGA 2009»
16 years 1 months ago
A parallel/vectorized double-precision exponential core to accelerate computational science applications
Many natural processes exhibit exponential decay and, consequently, computational scientists make extensive use of e−x in computer simulation experiments. While it is common to ...
Robin Pottathuparambil, Ron Sass
ICS
2009
Tsinghua U.
16 years 1 months ago
High-performance regular expression scanning on the Cell/B.E. processor
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
Daniele Paolo Scarpazza, Gregory F. Russell
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
16 years 9 days ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
EUROPAR
2009
Springer
15 years 11 months ago
Automatic Calibration of Performance Models on Heterogeneous Multicore Architectures
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
Cédric Augonnet, Samuel Thibault, Raymond N...
ICDCS
2010
IEEE
15 years 10 months ago
Guaranteeing BGP Stability with a Few Extra Paths
Abstract—Policy autonomy exercised by Autonomous Systems (ASes) on the Internet can result in persistent oscillations in Border Gateway Protocol, the Internet’s inter-domain ro...
Rachit Agarwal, Virajith Jalaparti, Matthew Caesar...