5005 search results - page 649 / 1001 » The Design and Analysis of Parallel Algorithms |
179
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
166
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...
179
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
189
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OOPSLA
2004
Springer
16 years 3 days ago
2004
Springer
This paper presents the design of G, a new language specifically created for generic programming. We review and identify important language features of C++ and Haskell in light o...
181
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ICRA
2002
IEEE
15 years 11 months ago
2002
IEEE
Trajectory design for high-dimensional systems with nonconvex constraints is a challenging problem considered in this paper. Classical dynamic programming is often employed, but c...