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» The Design and Analysis of Parallel Algorithms
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DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
16 years 1 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
VTS
2006
IEEE
122views Hardware» more  VTS 2006»
16 years 27 days ago
Early, Accurate and Fast Yield Estimation through Monte Carlo-Alternative Probabilistic Behavioral Analog System Simulations
Monte Carlo analysis has so far been the corner stone for analog statistical simulations. Fast and accurate simulations are necessary for stringent time-to-market, design for manu...
Rasit Onur Topaloglu
MEMOCODE
2003
IEEE
16 years 4 days ago
Optimizations for Faster Execution of Esterel Programs
Several efficient compilation techniques have been recently proposed for the generation of sequential (C) code from Esterel programs. Consisting essentially in direct simulation ...
Dumitru Potop-Butucaru, Robert de Simone
SIGCOMM
2010
ACM
15 years 7 months ago
DDE: dynamic data structure excavation
Dynamic Datastructure Excavation (DDE) is a new approach to extract datastructures from C binaries without any need for debugging symbols. Unlike most existing tools, DDE uses dyn...
Asia Slowinska, Traian Stancescu, Herbert Bos
IWRIDL
2006
ACM
149views Education» more  IWRIDL 2006»
16 years 25 days ago
From CLIR to CLIE: some lessons in NTCIR evaluation
Cross-language information retrieval (CLIR) facilitates the use of one language to access documents in other languages. Crosslanguage information extraction (CLIE) extracts releva...
Hsin-Hsi Chen