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» The Design and Analysis of Parallel Algorithms
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IPPS
2006
IEEE
16 years 23 days ago
Dynamic power saving in fat-tree interconnection networks using on/off links
Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this to...
Marina Alonso, Salvador Coll, Juan Miguel Mart&iac...
IPPS
2002
IEEE
15 years 11 months ago
Hierarchical Interconnects for On-Chip Clustering
In the sub-micron technology era, wire delays are becoming much more important than gate delays, making it particularly attractive to go for clustered designs. A common form of cl...
Aneesh Aggarwal, Manoj Franklin
CODES
2006
IEEE
16 years 24 days ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
JSA
2008
124views more  JSA 2008»
15 years 6 months ago
Processor array architectures for flexible approximate string matching
In this paper, we present linear processor array architectures for flexible approximate string matching. These architectures are based on parallel realization of dynamic programmi...
Panagiotis D. Michailidis, Konstantinos G. Margari...
DSS
2006
138views more  DSS 2006»
15 years 6 months ago
Design of a shopbot and recommender system for bundle purchases
The increasing proliferation of online shopping and purchasing has naturally led to a growth in the popularity of comparisonshopping search engines, popularly known as "shopb...
Robert S. Garfinkel, Ram D. Gopal, Arvind K. Tripa...