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» The Design, Implementation, and Evaluation of Jade
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ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
16 years 15 days ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
CLUSTER
2005
IEEE
16 years 15 days ago
A pipelined data-parallel algorithm for ILP
The amount of data collected and stored in databases is growing considerably for almost all areas of human activity. Processing this amount of data is very expensive, both humanly...
Nuno A. Fonseca, Fernando M. A. Silva, Víto...
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
16 years 15 days ago
A Complete Network-On-Chip Emulation Framework
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
ICAS
2005
IEEE
155views Robotics» more  ICAS 2005»
16 years 14 days ago
Analyzing the Impact of Components Replication in High Available J2EE Clusters
Clustering is a well known technique that allows scalability and fault tolerance in distributed systems. In the J2EE framework, clustering can be used to improve the performance a...
Davide Rossi, Elisa Turrini
ICDCSW
2005
IEEE
16 years 14 days ago
Forensix: A Robust, High-Performance Reconstruction System
When computer intrusions occur, one of the most costly, time-consuming, and human-intensive tasks is the analysis and recovery of the compromised system. At a time when the cost o...
Ashvin Goel, Wu-chang Feng, David Maier, Wu-chi Fe...