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» The Design, Implementation, and Evaluation of Jade
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NOCS
2007
IEEE
16 years 1 months ago
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
Thomas William Ainsworth, Timothy Mark Pinkston
SENSYS
2006
ACM
16 years 23 days ago
Data compression algorithms for energy-constrained devices in delay tolerant networks
Sensor networks are fundamentally constrained by the difficulty and energy expense of delivering information from sensors to sink. Our work has focused on garnering additional si...
Christopher M. Sadler, Margaret Martonosi
218
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MIDDLEWARE
2004
Springer
16 years 5 days ago
Adapting asynchronous messaging middleware to ad hoc networking
The characteristics of mobile environments, with the possibility of frequent disconnections and fluctuating bandwidth, have forced a rethink of traditional middleware. In particu...
Mirco Musolesi, Cecilia Mascolo, Stephen Hailes
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 11 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...
INFOCOM
1997
IEEE
15 years 11 months ago
Analysis of Queueing Displacement Using Switch Port Speedup
Current high-speed packet switching systems, ATM in particular, have large port bu ering requirements. The use of highly integrated ASIC technology for implementing high-degree an...
Israel Cidon, Asad Khamisy, Moshe Sidi