2663 search results - page 326 / 533 » The Design, Implementation, and Evaluation of Jade |
180
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...
157
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CODES
2006
IEEE
16 years 24 days ago
2006
IEEE
Embedded system synthesis, multiprocessor synthesis, and thread assignment policy design all require detailed knowledge of the runtime communication patterns among different threa...
194
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IPPS
2006
IEEE
16 years 23 days ago
2006
IEEE
In recent years, we have witnessed a growing interest in high performance computing (HPC) using a cluster of workstations. However, many challenges remain to be resolved before th...
193
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ISCA
2006
IEEE
16 years 22 days ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
172
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RTSS
2006
IEEE
16 years 22 days ago
2006
IEEE
In this paper, we describe the design and evaluation of a scheduler (referred to as Everest) for allocating processors to services in high performance, multi-service routers. A sc...