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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
16 years 7 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
CADE
2007
Springer
16 years 7 months ago
Combination Methods for Satisfiability and Model-Checking of Infinite-State Systems
Manna and Pnueli have extensively shown how a mixture of first-order logic (FOL) and discrete Linear time Temporal Logic (LTL) is sufficient to precisely state verification problem...
Silvio Ghilardi, Enrica Nicolini, Silvio Ranise, D...
ALT
2005
Springer
16 years 3 months ago
Defensive Universal Learning with Experts
This paper shows how universal learning can be achieved with expert advice. To this aim, we specify an experts algorithm with the following characteristics: (a) it uses only feedba...
Jan Poland, Marcus Hutter
MCS
2009
Springer
16 years 1 months ago
True Path Rule Hierarchical Ensembles
Abstract. Hierarchical classification problems gained increasing attention within the machine learning community, and several methods for hierarchically structured taxonomies have...
Giorgio Valentini
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 1 months ago
A MILP-based approach to path sensitization of embedded software
—We propose a new methodology based on Mixed Integer Linear Programming (MILP) for determining the input values that will exercise a specified execution path in a program. In or...
José C. Costa, José C. Monteiro