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ISLPED
2006
ACM
117views Hardware» more  ISLPED 2006»
16 years 20 days ago
Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
Samuel Rodríguez, Bruce L. Jacob
ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
16 years 8 days ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar
SIGCOMM
2005
ACM
16 years 8 days ago
Declarative routing: extensible routing with declarative queries
The Internet’s core routing infrastructure, while arguably robust and efficient, has proven to be difficult to evolve to accommodate the needs of new applications. Prior researc...
Boon Thau Loo, Joseph M. Hellerstein, Ion Stoica, ...
DIGRA
2005
Springer
16 years 7 days ago
Shadowplay: Simulated Illumination in Game Worlds
Despite the fact that there are currently a number of enjoyable digital games in which light plays a key role, we lack a vocabulary with which to discuss simulated illumination in...
Simon Niedenthal
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 11 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...