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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
CRITICAL
2005
15 years 8 months ago
Palpable time for heterogeneous care communities
This paper describes an ongoing design experience conducted in the Neonatal Intensive Care Unit for Premature Newborns. The specificity and the delicateness of such a setting prov...
Erik Grönvall, Patrizia Marti, Alessandro Pol...
CW
2005
IEEE
15 years 8 months ago
Using a Floating Origin to Improve Fidelity and Performance of Large, Distributed Virtual Worlds
Large Virtual Worlds (VWs) are increasingly common in the computer graphics areas of simulation, games, geospatial or scientific visualisation. In such VWs, simulated motion of th...
Chris Thorne
DAC
2005
ACM
15 years 8 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
15 years 8 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...