—Recently, the turbo-detected Sphere Packing (SP) aided Space-Time Block-Coding (STBC) STBC-SP scheme was demonstrated to provide useful performance improvements over conventiona...
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Abstract—In order to improve scalability and reduce maintenance overhead for structured Peer-to-Peer systems, researchers design optimal architectures with constant degree and lo...
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...