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AIM
2002
15 years 6 months ago
Specifying Rules for Electronic Auctions
We examine the design space of auction mechanisms and identify three core activities that structure this space. Formal parameters qualifying the performance core activities enable...
Peter R. Wurman, Michael P. Wellman, William E. Wa...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
16 years 3 months ago
Exploring the interplay of yield, area, and performance in processor caches
The deployment of future deep submicron technology calls for a careful review of existing cache organizations and design practices in terms of yield and performance. This paper pr...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
SAMOS
2005
Springer
16 years 5 days ago
Micro-architecture Performance Estimation by Formula
An analytical performance model for out of order issue superscalar micro-processors is presented. This model quantifies the performance impacts of micro-architecture design option...
Lucanus J. Simonson, Lei He
EHCI
1998
15 years 8 months ago
Embodied User Interfaces: Towards Invisible User Interfaces
: There have been several recent examples of user interface techniques in which the user uses a computational device by physically manipulating the device. This paper proposes that...
Kenneth P. Fishkin, Thomas P. Moran, Beverly L. Ha...
ISQED
2011
IEEE
240views Hardware» more  ISQED 2011»
14 years 9 months ago
Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling
—Design optimization methodologies for AMS-SoCs with analog, digital, and mixed-signal portions have not received significant attention, due to their high complexity. In mixed-s...
Oleg Garitselov, Saraju P. Mohanty, Elias Kougiano...