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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 8 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
15 years 11 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
ICC
2008
IEEE
136views Communications» more  ICC 2008»
16 years 26 days ago
A Game-Theoretic Framework for Interference Management through Cognitive Sensing
A game theoretic framework is developed in this paper to facilitate inter-cell interference management through cognitive sensing distributively performed by mobile stations (MSs)....
Yingda Chen, Koon Hoo Teo, Shalinee Kishore, Jinyu...
LCTRTS
2007
Springer
16 years 17 days ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
BMCBI
2007
194views more  BMCBI 2007»
15 years 6 months ago
A meta-data based method for DNA microarray imputation
Background: DNA microarray experiments are conducted in logical sets, such as time course profiling after a treatment is applied to the samples, or comparisons of the samples unde...
Rebecka Jörnsten, Ming Ouyang, Hui-Yu Wang