Sciweavers

4190 search results - page 622 / 838
» The Cost of Design
Sort
View
SCOPES
2004
Springer
15 years 12 months ago
Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition
Abstract. Synthesis of digital signal processing (DSP) software from dataflow-based formal models is an effective approach for tackling the complexity of modern DSP applications. I...
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattac...
WDAG
2004
Springer
98views Algorithms» more  WDAG 2004»
15 years 12 months ago
Dynamic Memory ABP Work-Stealing
The non-blocking work-stealing algorithm of Arora, Blumofe, and Plaxton (hencheforth ABP work-stealing) is on its way to becoming the multiprocessor load balancing technology of ch...
Danny Hendler, Yossi Lev, Nir Shavit
ACSAC
2003
IEEE
15 years 12 months ago
MLS-PCA: A High Assurance Security Architecture for Future Avionics
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
Clark Weissman
DFT
2003
IEEE
132views VLSI» more  DFT 2003»
15 years 12 months ago
Level-Hybrid Optoelectronic TESH Interconnection Network
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
Vijay K. Jain, Glenn H. Chapman
GLVLSI
2003
IEEE
132views VLSI» more  GLVLSI 2003»
15 years 12 months ago
A highly regular multi-phase reseeding technique for scan-based BIST
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
Emmanouil Kalligeros, Xrysovalantis Kavousianos, D...