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ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
16 years 1 months ago
Modeling and Synthesis of Hardware-Software Morphing
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
Dirk Koch, Christian Haubelt, Thilo Streichert, J&...
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
16 years 25 days ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...
IEEEARES
2006
IEEE
16 years 24 days ago
No Risk is Unsafe: Simulated Results on Dependability of Complementary Currencies
Efforts have been put for electronization of complementary currencies (alternative forms of monetary media) in the hope that it would reduce their operational cost. However, this ...
Kenji Saito, Eiichi Morino, Jun Murai
FPGA
1998
ACM
146views FPGA» more  FPGA 1998»
15 years 11 months ago
Boolean Matching for Complex PLBs in LUT-based FPGAs with Application to Architecture Evaluation
In this paper, we developed Boolean matching techniques for complex programmable logic blocks (PLBs) in LUT-based FPGAs. A complex PLB can not only be used as a K-input LUT, but a...
Jason Cong, Yean-Yow Hwang
BROADNETS
2004
IEEE
15 years 10 months ago
A Multi-Radio Unification Protocol for IEEE 802.11 Wireless Networks
We present a link layer protocol called the Multi-radio Unification Protocol or MUP. On a single node, MUP coordinates the operation of multiple wireless network cards tuned to no...
Atul Adya, Paramvir Bahl, Jitendra Padhye, Alec Wo...