Sciweavers

4190 search results - page 515 / 838
» The Cost of Design
Sort
View
SLIP
2005
ACM
16 years 10 days ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
DELTA
2008
IEEE
16 years 1 months ago
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
Hans G. Kerkhoff, Jarkko J. M. Huijts
DEEC
2006
IEEE
16 years 26 days ago
BestChoice: A Decision Support System for Supplier Selection in e-Marketplaces
A growing number of companies are outsourcing their purchasing processes to independent purchasing agencies. These agencies now have to process an ever increasing number of purchas...
Dongjoo Lee, Taehee Lee, Suekyung Lee, Ok-Ran Jeon...
173
Voted
NOMS
2006
IEEE
156views Communications» more  NOMS 2006»
16 years 24 days ago
An Integrated Solution to Protect Link State Routing against Faulty Intermediate Routers
— The importance of the routers in the network and the vulnerability in the nature of the link state routing protocol highlight the necessity of effective routing protection agai...
He Huang, Shyhtsun Felix Wu
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
16 years 2 days ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...