4190 search results - page 462 / 838 » The Cost of Design |
170
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
183
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DATE
2006
IEEE
16 years 28 days ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
212
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ICA3PP
2010
Springer
15 years 11 months ago
2010
Springer
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
188
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DAC
1999
ACM
15 years 11 months ago
1999
ACM
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
151
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PRL
2006
15 years 6 months ago
2006
This paper presents a novel camera network design methodology based on the Parisian evolutionary computation approach. This methodology proposes to partition the original problem ...