In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
Vinodh Cuppu, Bruce L. Jacob, Brian Davis, Trevor ...
M2MC is a new distributed computing middleware designed to support collaborative applications running on devices connected by broadcast networks. Examples of such networks are wire...
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
—Mnesic evocation occurs under the action of a stimulus. A successful evocation is observed as the overrun of a certain threshold of the neuronal activity followed by a medical i...