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201
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VIS
2007
IEEE
16 years 8 months ago
2007
IEEE
Just as we can work with two-dimensional floor plans to communicate 3D architectural design, we can exploit reduced-dimension shadows to manipulate the higher-dimensional objects ...
176
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DAC
2009
ACM
16 years 8 months ago
2009
ACM
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
210
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DAC
2007
ACM
16 years 8 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
201
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DAC
2001
ACM
16 years 8 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
200
Voted
SIGSOFT
2009
ACM
16 years 7 months ago
2009
ACM
Parallel changes are becoming increasingly prevalent in the development of large scale software system. To further study the relationship between parallel changes and faults, we h...