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ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
16 years 28 days ago
Hermes-GLP: A GALS Network on Chip Router with Power Control Techniques
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
Julian J. H. Pontes, Matheus T. Moreira, Rafael So...
CODES
2003
IEEE
15 years 12 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
SIGCOMM
1998
ACM
15 years 10 months ago
Quality of Service Based Routing: A Performance Perspective
Recent studies provide evidence that Quality ofService QoS routing can provide increased network utilization compared to routing that is not sensitive to QoS requirements of tra...
George Apostolopoulos, Roch Guérin, Sanjay ...
SIAMCOMP
1998
92views more  SIAMCOMP 1998»
15 years 6 months ago
Surface Approximation and Geometric Partitions
Motivated by applications in computer graphics, visualization, and scienti c computation, we study the computational complexity of the following problem: Given a set S of n points...
Pankaj K. Agarwal, Subhash Suri
DAC
2008
ACM
16 years 7 months ago
A progressive-ILP based routing algorithm for cross-referencing biochips
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang...