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CASES
2006
ACM
16 years 21 days ago
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, ...
RTCSA
2003
IEEE
15 years 12 months ago
Introducing Temporal Analyzability Late in the Lifecycle of Complex Real-Time Systems
Many industrial real-time systems have evolved over a long period of time and were initially so simple that it was possible to predict consequences of adding new functionality by c...
Anders Wall, Johan Andersson, Jonas Neander, Chris...
ISCA
2012
IEEE
244views Hardware» more  ISCA 2012»
13 years 9 months ago
Scheduling heterogeneous multi-cores through performance impact estimation (PIE)
Single-ISA heterogeneous multi-core processors are typically composed of small (e.g., in-order) power-efficient cores and big (e.g., out-of-order) high-performance cores. The eff...
Kenzo Van Craeynest, Aamer Jaleel, Lieven Eeckhout...
CLEIEJ
2007
90views more  CLEIEJ 2007»
15 years 6 months ago
Software - Implemented Self-healing System
The term “Self-healing” denotes the capability of a software system in dealing with bugs. Fault tolerance for dependable computing is to provide the specified service through ...
Goutam Kumar Saha
MEMOCODE
2010
IEEE
15 years 4 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler