1524 search results - page 269 / 305 » The Bandwidth Exchange Architecture |
174
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CC
2010
Springer
16 years 27 days ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
154
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SIGCOMM
2009
ACM
16 years 17 days ago
2009
ACM
This paper describes a new architecture which addresses Quality of Service (QoS) by creating unique flows for applications, services, or subnets. A flow is a dedicated and indep...
155
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SASP
2008
IEEE
16 years 13 days ago
2008
IEEE
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
180
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INFOCOM
2007
IEEE
16 years 11 days ago
2007
IEEE
Abstract— Service level agreements (SLAs) specify performance guarantees made by service providers, typically in terms of packet loss, delay, delay variation, and network availab...
196
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ICPP
2006
IEEE
16 years 3 days ago
2006
IEEE
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...