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VLSID
2009
IEEE
139views VLSI» more  VLSID 2009»
16 years 6 months ago
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...
Tameesh Suri, Aneesh Aggarwal
HPCA
2005
IEEE
16 years 6 months ago
A Unified Compressed Memory Hierarchy
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
Erik G. Hallnor, Steven K. Reinhardt
HPCA
2003
IEEE
16 years 6 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
HPCA
2003
IEEE
16 years 6 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
PERCOM
2008
ACM
16 years 5 months ago
HARMONI: Context-aware Filtering of Sensor Data for Continuous Remote Health Monitoring
A promising architecture for remote healthcare monitoring involves the use of a pervasive device (such as a cellular phone), which aggregates data from multiple body-worn medical ...
Iqbal Mohomed, Archan Misra, Maria Ebling, William...