The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
In this paper, we argue that the address space of memory regions that participate in inter task communication is over-specified by the traditional communication models used in beh...
M. N. V. Satya Kiran, M. N. Jayram, Pradeep Rao, S...
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
Scalable storage architectures allow for the addition or removal of storage devices to increase storage capacity and bandwidth or retire older devices. Assuming random placement of...