Sciweavers

1524 search results - page 100 / 305
» The Bandwidth Exchange Architecture
Sort
View
TC
2010
15 years 27 days ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
16 years 19 days ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
LCN
2003
IEEE
15 years 11 months ago
Analysis of Prioritized Scheduling of Assured Forwarding in DiffServ Architectures
Assured Service has been proposed within the Differentiated Services (DiffServ) model to provide relative service differentiation by attempting to allocate bandwidth to different ...
Nzinga D. Kiameso, Hossam S. Hassanein, Hussein T....
IPPS
2000
IEEE
15 years 10 months ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
15 years 10 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus