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IEEEPACT
2006
IEEE
16 years 15 days ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 10 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
ICMCS
2009
IEEE
183views Multimedia» more  ICMCS 2009»
15 years 4 months ago
Modeling the tele-immersive systems using stochastic activity network
The next-generation social communication medium, teleimmersion, is receiving increasing attention from both the research and industrial communities. It enables interaction between...
Rahul Malik, Wanmin Wu, Klara Nahrstedt
GECCO
2010
Springer
195views Optimization» more  GECCO 2010»
15 years 10 months ago
GPU-based island model for evolutionary algorithms
The island model for evolutionary algorithms allows to delay the global convergence of the evolution process and encourage diversity. However, solving large size and time-intensiv...
Thé Van Luong, Nouredine Melab, El-Ghazali ...
MEMOCODE
2008
IEEE
16 years 26 days ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier