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FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
15 years 11 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
SIGCOMM
1994
ACM
15 years 10 months ago
Improved Algorithms for Synchronizing Computer Network Clocks
The Network Time Protocol (NTP) is widely deployed in the Internet to synchronize computer clocks to each other and to international standards via telephone modem, radio and satel...
David L. Mills
CODES
2007
IEEE
15 years 10 months ago
A computational reflection mechanism to support platform debugging in SystemC
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity...
Bruno Albertini, Sandro Rigo, Guido Araujo, Cristi...
GLVLSI
2007
IEEE
194views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Probabilistic maximum error modeling for unreliable logic circuits
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
Karthikeyan Lingasubramanian, Sanjukta Bhanja
ATAL
2006
Springer
15 years 10 months ago
The communication complexity of coalition formation among autonomous agents
It is self-evident that in numerous Multiagent settings, selfish agents stand to benefit from cooperating by forming coalitions. Nevertheless, negotiating a stable distribution of...
Ariel D. Procaccia, Jeffrey S. Rosenschein
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